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EMC PSpice Library |
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EMC PSpice Symbols |
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Use this tool to calculate the Wunsch-Bell parameter K from the human body model ESD rating. See Useful Equations below and Reference [1] for the details on the equation used by the calculator.
| - Device Breakdown Voltage | (V) | ||
| - Rated HBM ESD Voltage | (kV) | ||
| - HBM Capacitance Value | (pF) | ||
| - HBM Resistance Value | (kΩ) |
This burnout model is used to predict semiconductor device burnout in PSpice for arbitrary waveforms. The model is generalized to match experimental data including pulse power testing, transmission line pulse testing, and human body model testing. For a complete description of the burnout model please see Reference [1].
Semiconductor devices can be damaged in the following two conditions:
The first damage condition (Over-Voltage) is relatively straight forward to model. The second damage condition (Burnout) is much more complicated to model accurately due to the time dependance. The pulse magnitude, width, and waveform shape must be considered for accurate simulations.
The simulation of device burnout is made easy using this PSpice burnout model.
The time dependance of burnout damage threshold this described using the generalized Wunsch-Bell model, as described in Reference [1] Equation (9), for a rectangular pulse is
with
The Wunsch-Bell parameter can be estimated, as described in Reference [1] Equation (28), by assuming B=0.5 and a human body pulse rating as
with
Testing is required to determine the Wunsch-Bell burnout parameters using the equations above. Transmission line pulse (TLP) testing (sometimes called pulse power testing) is preferred as best practice because it tests the response of the device for multiple pulse widths (see References [2] and [3]). However, human body model (HBM) electrostatic discharge (ESD) test data is nearly always performed by the manufacturer (see References [4], [5], and [6]) in the part qualification process and the data is freely available. Human body model testing is required by virtually all part qualification standards used by commercial, automotive, and military grade semiconductor manufacturers but can still be difficult to track down. Some manufacturers are nice enough to list the rating in their datasheets or on their website, but contacting the company for the HBM rating directly may be required. Military grade parts qualified under
The HBM test is designed to minimize the risk of damage to semiconductor devices during assembly in an ESD controlled environment. The HBM rating of a part should not be used by itself to determine acceptability to any other test standard including the human borne ESD tests called out in References [9], [10], [11], and [12].
Under current HBM testing standards the pass/fail criteria are always determined by the device manufacturer. A full check for functional changes is never performed and failures can occur at lower HBM voltages than claimed by the manufacturer if other pass/failure criteria is used. Also, manufacturers typically consider any change allowed so long as the part remains within specification. For critical applications this is not sufficient because any shift in a parts parameter indicates some preliminary damage or structural change has occurred. This damage can lead to latent ESD damage in flight and may result in mission loss. As a minimum standard of care, I recommend that you derate the calculated burnout parameter by 6 dB (divide K by 4) to provide a safe allowable power level. I have seen this HBM with 6 dB derating method give similar Wunsch-Bell parameter levels when compared with power pulse/TLP testing and derating using KTL (99/90) statistical methods.
Assumptions on a semiconductor device's hardness should be avoided since small process changes can drastically change the ESD rating of the part. Qualification testing is usually repeated when a significant process change is implemented, such as moving the semiconductor fabrication to a new site location. However, qualification only requires that testing is performed. No minimum human body model rating is required under most qualification standards for active semiconductor devices. The HBM level must be checked.
For aerospace electronics in particular, semiconductor devices that are radiation hardened are usually not hardened to ESD and are usually more susceptible to damage than a similar commercial grade part. This is because the circuits and fabrication processes that do best for ESD are typically not useable in radiation hardened designs due to latch-up mechanisms.
If you have concerns about ESD damage in your design, then please reach out to Russell Carroll.
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